Design Verification Engineer

Job description

Design verification engineer

location - banglore

Key Responsibilities:

• Develop Verification Plans: Understand design specifications and define the verification scope. Develop detailed test plans and verification infrastructure.
• Execute Verification Tests: Implement and Execute verification test cases and debug complex issues. Implement and analyze System Verilog assertions and coverage (code, toggle, functional).
• Collaborate with Teams: Work closely with architects, designers, and pre and post-silicon verification teams to accomplish tasks.
• Innovate Solutions: Develop innovative solutions to verification challenges with minimal guidance. Ramp-up on new verification tools and methodologies. Explore innovative DV methodologies to continuously push the quality and efficiency of test benches.
• Adhere to Standards: Maintain quality standards and best practices in test and verification processes.

Thanks and Regards
Sonali Chatterjee
9201975268